The present invention relates generally to semiconductor device manufacturing and more particularly to methods of removing hard masks.
In the semiconductor industry, there is a continuing trend toward high device densities. To achieve these high device densities, small features on semiconductor wafers are required. These may include the width and spacing of interconnecting lines, spacing and diameter of contact holes, and spacing and width of doped regions of a substrate, such as regions that form buried bit lines in a memory array.
High resolution lithographic processes are used to achieve small features. In general, lithography refers to processes for pattern transfer between various media. In lithography for integrated circuit fabrication, a silicon slice, the wafer, is coated uniformly with a radiation-sensitive film, the resist. The film is selectively exposed with radiation (such as visible light, ultraviolet light, x-rays, or an electron beam) through an intervening master template, the mask or reticle, forming a particular pattern. Exposed areas of the coating become either more or less soluble than the unexposed areas, depending on the type of coating, in a particular solvent developer. The more soluble areas are removed with the developer in a developing step. The less soluble areas remain on the silicon wafer, forming a patterned resist. The pattern of the resist corresponds to the image, or negative image, of the reticle.
The resist pattern is generally used as a mask for an etch process wherein the resist pattern is transferred to an underlying layer. In some cases, the resist is not sufficiently durable to survive the conditions required to etch the layer in which the pattern is desired. In such cases, the resist pattern is first transferred to an intermediate layer, which is referred to as a hard mask. The hard mask is etched using the resist as a pattern. The resist is then stripped and another etch process is used to transfer the pattern to a layer beneath the hard mask. Finally, the hard mask is stripped.
For example, polysilicon layers are generally patterned using a hard mask. The hard mask is typically silicon nitride (SiN) or silicon oxynitride (SiON) and can function as a bottom anti-reflective coating (BARC) that facilitates the lithographic process. The resist is formed over the hard mask and lithographically patterned. The pattern is transferred from the resist to the hard mask by plasma etching, using CF4, for example. After stripping the resist, the pattern is transferred from the hard mask to the polysilicon by etching with Cl2 and HBr. The hard mask is then removed, typicaily with phosphoric acid.
A difficulty with the forgoing process is that the hard mask strip with phosphoric acid has a tendency to damage the polysilicon layer. Removal of the hardmask by plasma etching has also been considered, but plasma etching tends to gauge oxide layers where they are exposed within the pattern gaps of the polysilicon layer. There is an unsatisfied need for methods of removing hard masks while minimizing damage to polysilicon and oxide structures.
The following presents a simplified summary of the invention in order to provide a basic understanding of some of its aspects. This sun unary is not an extensive overview of the invention and is intended neither to identify key or critical elements of the invention nor to delineate its scope. The primary purpose of this summary is to present some concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later.
One aspect of the invention relates to a method of removing a hard mask from a surface, especially a silicon surface. The hard mask is removed by first applying a sacrificial coating and then plasma etching. The sacrificial material fills pattern gaps formed using the hard mask and protects insulators, such as oxides, within those pattern gaps. The sacrificial material is removed together with the hard mask by the plasma etching. The invention provides a process for removing hard masks from silicon layers without significantly damaging either the silicon or any exposed oxides and can be applied in a variety of integrated circuit device manufacturing processes, such as patterning the floating gate layer of a flash memory device.
Other advantages and novel features of the invention will become apparent from the following detailed description of the invention and the accompanying drawings. The detailed description of the invention and drawings provide exemplary embodiments of the invention. These exemplary embodiments are indicative of but a few of the various ways in which the principles of the invention can be employed.